News

Design And Reuse2h
Launch of BrainChip Developer Hub Accelerates Event-Based AI Innovation on Akida™ Platform with Release of MetaTF 2.13
BrainChip’s new Developer Hub and AI models underscore the company’s commitment to making edge AI more accessible and scalable. With Akida, developers can build responsive, privacy-aware applications ...
Design And Reuse2h
Cadence Welcomes VLAB Works
Cadence welcomes VLAB Works, a division of Australian Semiconductor Technology Corporation (ASTC) and a renowned leader in virtual platforms. The VLAB Works team provides an ultra-high-performance ...
Design And Reuse1d
Cadence Launches Cache-Coherent HiFi 5s SMP for Next-Gen Audio Applications
Amid this rapidly evolving landscape, an out-of-the-box hardware design with multicore-enabling operating software is needed to reduce hardware design time and tame the software complexity of ...
Design And Reuse2d
How Arasan s SoundWire PHY Can Elevate Your Next Audio SoC
If your next SoC needs a robust, power-efficient, and real-time audio interface, Arasan’s SoundWire PHY is the ideal ...
Design And Reuse6d
InCore Unveils SoC Generator Platform: From Idea to FPGA Validation in Minutes; Demonstrates Silicon Proof of Auto-Generated SoC
InCore Semiconductors, a fabless semiconductor startup, today announced a major milestone with the successful silicon ...
Design And Reuse3d
Why Hardware Security Is Just as Critical as Software Security in Modern Systems
Hardware security — implemented at the silicon level across processors, storage components, input/output devices, and power supplies — and software security play distinct roles and have unique ...
Design And Reuse2d
PCIe 7.0 Keeps Pace with AI Demands
Aimed at AI, cloud and data center environments, the Optical Aware Retimer Engineering Change Notice amends the PCIe 6.4 specification and the new PCIe 7.0 specification to include a PCIe ...
Design And Reuse2d
Sustainable semiconductor manufacturing - too little too late or Europe protectionism?
58 companies and research organisations across Europe have come together in a €55m programme to boost the sustainability of producing semiconductor devices. From energy and water use to the gases and ...
Design And Reuse3d
CAST Launches Multi-Channel DMA IP Core Ideal for Streaming Applications
Woodcliff Lake, New Jersey — June 19, 2025 — Semiconductor intellectual property core provider CAST has introduced a new direct memory access (DMA) IP core that alleviates a system’s host CPU from the ...
Design-Reuse6d
PCIe 6.x and 112 Gbps Ethernet: Synopsys and TeraSignal Achieve Optical Interconnect Breakthroughs
Synopsys and TeraSignal have reached two milestones in optical networking, demonstrating seamless interoperability for PCIe 6.x and 112 Gbps Ethernet over linear optics. These industry-first ...
Design And Reuse3d
CEA-Leti and Soitec Announce Strategic Partnership to Leverage FD-SOI for Enhanced Security of Integrated Circuits
CEA-Leti and Soitec today announced a strategic partnership to enhance the cybersecurity of integrated circuits (ICs) through the innovative use of fully depleted silicon-on-insulator (FD-SOI) ...
Design And Reuse3d
BT Group Joins the CHERI Alliance to Advance Cybersecurity Innovation
BT’s decision to join the CHERI Alliance underscores its commitment to staying at the forefront of cybersecurity innovation. The company will contribute its expertise in secure communications and ...